SN74LVTH125IPWREP 供应商
-
SN74LVTH125IPWREP
品牌：TI 封装/批号：原厂原装/22+ -
SN74LVTH125IPWREP
品牌：TI(德州仪器) 封装/批号：TSSOP-14/2022+
SN74LVTH125IPWREP 属性参数
- 标准包装：1
- 类别：集成电路 (IC)
- 家庭：逻辑 - 缓冲器，驱动器，接收器，收发器
- 系列：74LVTH
- 逻辑类型：缓冲器/线路驱动器，非反相
- 元件数：4
- 每个元件的位元数：1
- 输出电流高，低：32mA，64mA
- 电源电压：2.7 V ~ 3.6 V
- 工作温度：-40°C ~ 85°C
- 安装类型：表面贴装
- 封装/外壳：14-TSSOP（0.173"，4.40mm 宽）
- 供应商设备封装：14-TSSOP
- 包装：®
- 其它名称：296-22386-6
产品特性
- Controlled Baseline One Assembly/Test Site, One Fabrication Site
- One Assembly/Test Site, One Fabrication Site
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree
- Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
- Supports Unregulated Battery Operation Down to 2.7 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Ioff and Power-Up 3-State Support Hot Insertion
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Latch-Up Performance Exceeds 500 mA Per JESD 17
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
产品概述
This bus buffer is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide
a TTL interface to a 5-V system environment.The SN74LVTH125 features independent line drivers with 3-state outputs. Each output is in the high-impedance
state when the associated output-enable (OE)\ input is high.Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
SN74LVTH125IPWREP