SN74LV244ATRGYRG4 供应商
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SN74LV244ATRGYRG4
品牌：TI 封装/批号：原厂原装/22+
SN74LV244ATRGYRG4 属性参数
- 标准包装：3,000
- 类别：集成电路 (IC)
- 家庭：逻辑 - 缓冲器，驱动器，接收器，收发器
- 系列：74LV
- 逻辑类型：缓冲器/线路驱动器，非反相
- 元件数：2
- 每个元件的位元数：4
- 输出电流高，低：16mA，16mA
- 电源电压：4.5 V ~ 5.5 V
- 工作温度：-40°C ~ 85°C
- 安装类型：表面贴装
- 封装/外壳：20-VFQFN 裸露焊盘
- 供应商设备封装：20-VQFN-EP（3.5x4.5）
- 包装：带卷 (TR)
产品特性
- Inputs Are TTL-Voltage Compatible
- 4.5-V to 5.5-V VCC Operation
- Typical tpd = 5.4 ns at 5 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 5 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 5 V, TA = 25°C
- Supports Mixed-Mode Voltage Operation on All Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
This octal buffer/driver is designed specifically to improve both the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.The SN74LV244AT is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE shall be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.