SN74LS125ADR 供应商
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SN74LS125ADR
品牌:TI 封装/批号:原厂原装/22+ -
SN74LS125ADR
品牌:TI 封装/批号:SOP3.9/8 -
SN74LS125ADR
品牌:TI 封装/批号:*/2032 -
SN74LS125ADR
品牌: 封装/批号:/2019+ -
SN74LS125ADR
品牌:TI(德州仪器) 封装/批号:SOIC-14_150mil/2022+ -
SN74LS125ADR
品牌:TI 封装/批号:镙栓型二极管/23+ -
SN74LS125ADR
品牌:TI 封装/批号:/21+ -
SN74LS125ADR
品牌: 封装/批号:/23+ -
SN74LS125ADR
品牌:TI 封装/批号:/2021+ -
SN74LS125ADR
品牌:TI 封装/批号:SOP-14/23+
SN74LS125ADR 属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 缓冲器,驱动器,接收器,收发器
- 系列:74LS
- 逻辑类型:缓冲器/线路驱动器,非反相
- 元件数:4
- 每个元件的位元数:1
- 输出电流高,低:2.6mA,24mA
- 电源电压:4.75 V ~ 5.25 V
- 工作温度:0°C ~ 70°C
- 安装类型:表面贴装
- 封装/外壳:14-SOIC(0.154",3.90mm 宽)
- 供应商设备封装:14-SOIC
- 包装:®
- 其它名称:296-1637-6
产品特性
- Quad Bus Buffers
- 3-State Outputs
- Separate Control for Each Channel
产品概述
These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the output will act neither as a significant load nor as a driver. The 125 and LS125A devices outputs are disabled when G\ is high. The 126 and LS126A devices outputs are disabled when G is low.