IC元器件

SN74AUP1G17MDCKREP

参考价格:$0.6665-$1.55

Texas Instruments 逻辑 - 缓冲器,驱动器,接收器,收发器

SN74AUP1G17MDCKREP 供应商

SN74AUP1G17MDCKREP 属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 缓冲器,驱动器,接收器,收发器
  • 系列:74AUP
  • 逻辑类型:施密特触发器 - 缓冲器,驱动器
  • 元件数:1
  • 每个元件的位元数:1
  • 输出电流高,低:4mA,4mA
  • 电源电压:0.8 V ~ 3.6 V
  • 工作温度:-55°C ~ 125°C
  • 安装类型:表面贴装
  • 封装/外壳:6-TSSOP(5 引线),SC-88A,SOT-353
  • 供应商设备封装:SC-70-5
  • 包装:®
  • 其它名称:296-22293-6

产品特性

  • Controlled BaselineOne Assembly/Test Site, One Fabrication Site
  • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Available in the Texas Instruments NanoStar™ and NanoFree™ Packages
  • Low Static-Power Consumption (ICC = 0.9 µA Max)
  • Low Dynamic-Power Consumption (Cpd = 4.4 pF Typ at 3.3 V)
  • Low Input Capacitance (CI = 1.5 pF)
  • Low Noise — Overshoot and Undershoot <10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Includes Schmitt-Trigger Inputs
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 5.1 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 222000-V Human-Body Model (A114-B, Class II)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)
  • 2000-V Human-Body Model (A114-B, Class II)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)
  • ESD Protection Exceeds 5000 V With Human-Body Model

产品概述

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity.This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching noise immunity at the input.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74AUP1G17MDCKREP 数据手册