CLVC1G126IDCKREP 供应商
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CLVC1G126IDCKREP
品牌：TI 封装/批号：原厂原装/22+
CLVC1G126IDCKREP 属性参数
- 标准包装：1
- 类别：集成电路 (IC)
- 家庭：逻辑 - 缓冲器，驱动器，接收器，收发器
- 系列：74LVC
- 逻辑类型：缓冲器/线路驱动器，非反相
- 元件数：1
- 每个元件的位元数：1
- 输出电流高，低：32mA，12mA
- 电源电压：1.65 V ~ 5.5 V
- 工作温度：-40°C ~ 85°C
- 安装类型：表面贴装
- 封装/外壳：6-TSSOP（5 引线），SC-88A，SOT-353
- 供应商设备封装：SC-70-5
- 包装：®
- 其它名称：296-22110-6
产品特性
- Controlled Baseline One Assembly/Test Site, One Fabrication Site
- One Assembly/Test Site, One Fabrication Site
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 3.7 ns at 3.3 V
- Low Power Consumption, 10-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
This single bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.The SN74LVC1G126 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is low.To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.