74ALVCH16245DGGRG4 供应商
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74ALVCH16245DGGRG4
品牌：TI 封装/批号：原厂原装/22+ -
74ALVCH16245DGGRG4
品牌：TI(德州仪器) 封装/批号：TSSOP-48/2022+
74ALVCH16245DGGRG4 属性参数
- 标准包装：2,000
- 类别：集成电路 (IC)
- 家庭：逻辑 - 缓冲器，驱动器，接收器，收发器
- 系列：74ALVCH
- 逻辑类型：收发器，非反相
- 元件数：2
- 每个元件的位元数：8
- 输出电流高，低：24mA，24mA
- 电源电压：1.65 V ~ 3.6 V
- 工作温度：-40°C ~ 85°C
- 安装类型：表面贴装
- 封装/外壳：48-TFSOP（0.240"，6.10mm 宽）
- 供应商设备封装：48-TSSOP
- 包装：带卷 (TR)
产品特性
- Member of the Texas Instruments Widebus™ Family
- Operates From 1.65 V to 3.6 V
- Max tpd of 3 ns at 3.3 V
- ±24-mA Output Drive at 3.3 V
- Bus Hold on Data Inputs Eliminates the Need for External Pullup or Pulldown Resistors
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
产品概述
This 16-bit (dual-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V
VCC operation.The SN74ALVCH16245 device is designed for asynchronous communication between two data
buses. The logic levels of the direction-control (DIR) input and the output-enable
(OE) input activate either the B-port outputs or the A-port outputs or place
both output ports into the high-impedance mode. The device transmits data from the A bus to the B
bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs
are activated. The input circuitry on both A and B ports is always active and must have a logic
high or low level applied to prevent excess ICC and
ICCZ.To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the
driver.Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of
pullup or pulldown resistors with the bus-hold circuitry is not recommended.
74ALVCH16245DGGRG4 电路图
