IC元器件

SNJ54LVTH162245WD

Texas Instruments 缓冲器，驱动器，接收器，收发器

SNJ54LVTH162245WD 供应商

SNJ54LVTH162245WD 属性参数

  • 现有数量：0现货9,775Factory
  • 价格：在售
  • 系列：*
  • 包装：管件
  • 产品状态：在售
  • 逻辑类型：-
  • 元件数：-
  • 每个元件位数：-
  • 输入类型：-
  • 输出类型：-
  • 电流 - 输出高、低：-
  • 电压 - 供电：-
  • 工作温度：-
  • 安装类型：-
  • 封装/外壳：-
  • 供应商器件封装：-

产品特性

  • Members of the Texas Instruments Widebus™ Family
  • A-Port Outputs Have Equivalent 22- Series Resistors, So No External Resistors Are Required
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Support Unregulated Battery Operation Down to 2.7 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

产品概述

The 'LVTH162245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.These devices can be used as two 8-bit transceivers or one 16-bit transceiver. The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22- series resistors to reduce overshoot and undershoot.When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
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