SN74LVCZ16240ADGGR 供应商
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SN74LVCZ16240ADGGR
品牌:TI 封装/批号:原厂原装/22+ -
SN74LVCZ16240ADGGR
品牌:TI(德州仪器) 封装/批号:TSSOP-48/2022+
SN74LVCZ16240ADGGR 属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 栅极和逆变器
- 系列:74LVCZ
- 逻辑类型:逆变器,缓冲器
- 电路数:4
- 输入数:4
- 特点:三态
- 电源电压:2.7 V ~ 3.6 V
- 电流 - 静态(最大值):100µA
- 输出电流高,低:24mA,24mA
- 逻辑电平 - 低:0.8V
- 逻辑电平 - 高:2V
- 额定电压和最大 CL 时的最大传播延迟:4.2ns @ 3.3V,50pF
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 供应商设备封装:48-TSSOP
- 封装/外壳:48-TFSOP(0.240",6.10mm 宽)
- 包装:®
- 其它名称:296-9866-6
产品特性
- Member of the Texas Instruments Widebus Family
- Operates From 2.7 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 4.2 ns at 3.3 V
- Ioff and Power-Up 3-State Support Hot Insertion
- Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)
产品概述
This 16-bit buffer/driver is designed for 2.7-V to 3.6-V VCC operation.The SN74LVCZ16240A is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. This device provides inverting outputs.Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.During power up or power down when VCC is between 0 and 1.5 V, the device is in the high-impedance state. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down (VCC = 0 V). The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.