SN74LVC2G32MDCUREP 供应商
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SN74LVC2G32MDCUREP
品牌:TI 封装/批号:原厂原装/22+ -
SN74LVC2G32MDCUREP
品牌:TI(德州仪器) 封装/批号:VSSOP-8/2022+ -
SN74LVC2G32MDCUREP
品牌:SN/ELNAF 封装/批号:VSSOP-8/1805+
SN74LVC2G32MDCUREP 属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 栅极和逆变器
- 系列:74LVC
- 逻辑类型:或门
- 电路数:2
- 输入数:2
- 特点:-
- 电源电压:1.65 V ~ 5.5 V
- 电流 - 静态(最大值):10µA
- 输出电流高,低:32mA,32mA
- 逻辑电平 - 低:0.7 V ~ 0.8 V
- 逻辑电平 - 高:1.7 V ~ 2 V
- 额定电压和最大 CL 时的最大传播延迟:4.7ns @ 5V,50pF
- 工作温度:-55°C ~ 125°C
- 安装类型:表面贴装
- 供应商设备封装:US8
- 封装/外壳:8-VFSOP(0.091",2.30mm 宽)
- 包装:®
- 其它名称:296-22359-6
产品特性
- Controlled BaselineOne Assembly/Test Site, One Fabrication Site
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of -55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree(1)
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 3.8 ns at 3.3 V
- Low Power Consumption, 10-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
- Ioff Supports Partial Power-Down-Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
This dual 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation.The SN74LVC2G32 performs the Boolean function Y= A + B or Y = A\ B\ in positive logic.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.