IC元器件

SN74LVC1G79WDCKREP

参考价格:$0.363-$0.91

Texas Instruments 逻辑 - 触发器

SN74LVC1G79WDCKREP 供应商

SN74LVC1G79WDCKREP 属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 触发器
  • 系列:74LVC
  • 功能:标准
  • 类型:D 型
  • 输出类型:非反相
  • 元件数:1
  • 每个元件的位元数:1
  • 频率 - 时钟:160MHz
  • 延迟时间 - 传输:1ns
  • 触发器类型:正边沿
  • 输出电流高,低:32mA,32mA
  • 电源电压:1.65 V ~ 5.5 V
  • 工作温度:-55°C ~ 115°C
  • 安装类型:表面贴装
  • 封装/外壳:6-TSSOP(5 引线),SC-88A,SOT-353
  • 包装:®
  • 其它名称:296-19506-6

产品特性

  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 5 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Military (–55°C/125°C) Temperature Range(1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability
  • Controlled Baseline
  • One Assembly/Test Site
  • One Fabrication Site
  • Available in Military (–55°C/125°C) Temperature Range(1)
  • Extended Product Life Cycle
  • Extended Product-Change Notification
  • Product Traceability

产品概述

This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.