IC元器件

SN74LV393ATPWREP

参考价格:$1.1175-$2.39

Texas Instruments 逻辑 -计数器,除法器

SN74LV393ATPWREP 供应商

SN74LV393ATPWREP 属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 -计数器,除法器
  • 系列:74LV
  • 逻辑类型:二进制计数器
  • 方向:
  • 元件数:2
  • 每个元件的位元数:4
  • 复位:异步
  • 计时:-
  • 计数速率:70MHz
  • 触发器类型:负边沿
  • 电源电压:2 V ~ 5.5 V
  • 工作温度:-40°C ~ 105°C
  • 安装类型:表面贴装
  • 封装/外壳:14-TSSOP(0.173",4.40mm 宽)
  • 供应商设备封装:14-TSSOP
  • 包装:®
  • 其它名称:296-22313-6

产品特性

  • Controlled Baseline One Assembly/Test Site, One Fabrication Site
  • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 105°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 5.5-V VCC Operation
  • Max tpd of 14.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce)    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)    >2.3 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Partial-Power-Down-Mode Operation
  • Dual 4-Bit Binary Counters With Individual Clocks
  • Direct Clear for Each 4-Bit Counter
  • Can Significantly Improve System Densities by Reducing Counter Package Count by 50 Percent

产品概述

The SN74LV393A contains eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. This device is designed for 2-V to 5.5-V VCC operation.This device comprises two independent 4-bit binary counters, each having a clear (CLR) and a clock (CLK)\ input. The device changes state on the negative-going transition of the CLK\ pulse. N-bit binary counters can be implemented with each package, providing the capability of divide by 256. The SN74LV393A has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system timing signals.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74LV393ATPWREP 数据手册