SN74LS240N 供应商
-
SN74LS240NSR 原装现货
品牌：TI 封装/批号：SOP5.2/17+/22+ -
SN74LS240N
品牌：TI 封装/批号：原厂原装/22+ -
SN74LS240N
品牌：TI 封装/批号：/2019+ -
SN74LS240N
品牌：TI 封装/批号：/21+ -
SN74LS240N
品牌：TI 封装/批号：DIP/新年份 -
SN74LS240N
品牌：TEXSA 封装/批号：DIP1/22+ -
SN74LS240N
品牌： 封装/批号：/23+ -
SN74LS240N
品牌：TI 封装/批号：TSSOP/23+ -
SN74LS240NS
品牌：TI 封装/批号：SOP/23+ -
SN74LS240NSR
品牌：TI 封装/批号：/8
SN74LS240N 属性参数
- 标准包装：20
- 类别：集成电路 (IC)
- 家庭：逻辑 - 栅极和逆变器
- 系列：74LS
- 逻辑类型：逆变器，缓冲器
- 电路数：2
- 输入数：4
- 特点：三态
- 电源电压：4.75 V ~ 5.25 V
- 电流 - 静态（最大值）：-
- 输出电流高，低：15mA，24mA
- 逻辑电平 - 低：0.8V
- 逻辑电平 - 高：2V
- 额定电压和最大 CL 时的最大传播延迟：18ns @ 5V，45pF
- 工作温度：0°C ~ 70°C
- 安装类型：通孔
- 供应商设备封装：20-PDIP
- 封装/外壳：20-DIP（0.300"，7.62mm）
- 包装：管件
- 其它名称：296-1651296-1651-5
产品特性
- Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs
- Maximum tpd of 15 ns at 5 V
- 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
- PNP Inputs Reduce DC Loading
- Hysteresis at Inputs Improves Noise Margins
产品概述
The SNx4LS24x, SNx4S24x octal buffers and line drivers are designed specifically to
improve both the performance and density of three-state memory address drivers, clock drivers, and
bus-oriented receivers and transmitters. The designer has a choice of selected combinations of
inverting and non-inverting outputs, symmetrical, active-low output-control
(G) inputs, and complementary output-control (G and
G) inputs. These devices feature high fan-out, improved fan-in, and 400-mV
noise margin. The SN74LS24x and SN74S24x devices can be used to drive terminated lines down to 133
Ω.
SN74LS240N 数据手册
SN74LS240N3
SN74LS240N 电路图
