SN74HC165QPWRQ1 供应商
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SN74HC165QPWRQ1
品牌:TI 封装/批号:原厂原装/22+ -
SN74HC165QPWRQ1
品牌:TI 封装/批号:TSSOP-16/24+ -
SN74HC165QPWRQ1
品牌:TI(德州仪器) 封装/批号:TSSOP-16/2022+
SN74HC165QPWRQ1 属性参数
- 标准包装:2,000
- 类别:集成电路 (IC)
- 家庭:逻辑 - 移位寄存器
- 系列:74HC
- 逻辑类型:移位寄存器
- 输出类型:差分
- 元件数:1
- 每个元件的位元数:8
- 功能:并行或串行至串行
- 电源电压:2 V ~ 6 V
- 工作温度:-40°C ~ 125°C
- 安装类型:表面贴装
- 封装/外壳:16-TSSOP(0.173",4.40mm 宽)
- 供应商设备封装:16-TSSOP
- 包装:带卷 (TR)
产品特性
- Qualified for Automotive Applications
- ESD Protection Exceeds 1500 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Wide Operating Voltage Range of 2 V to 6 V
- Outputs Can Drive Up To 10 LSTTL Loads
- Low Power Consumption, 80-µA Max ICC
- Typical tpd = 13 ns
- ±4-mA Output Drive at 5 V
- Low Input Current of 1 µA Max
- Complementary Outputs
- Direct Overriding Load (Data) Inputs
- Gated Clock Inputs
- Parallel-to-Serial Data Conversion
产品概述
The SN74HC165 is an 8-bit parallel-load shift register that, when clocked, shift the data toward a serial (QH) output. Parallel-in access to each stage is provided by eight individual direct data (A-H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SN74HC165 also features a clock-inhibit (CLK INH) function and a complementary serial (QH) output.Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Since a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH should be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel inputs to the
register are enabled independently of the levels of the CLK, CLK INH, or serial (SER) inputs.