SN74ALVCH162721DLR 供应商
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SN74ALVCH162721DLR
品牌:TI 封装/批号:原厂原装/22+
SN74ALVCH162721DLR 属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 触发器
- 系列:74ALVCH
- 功能:标准
- 类型:D 型总线
- 输出类型:三态非反相
- 元件数:1
- 每个元件的位元数:20
- 频率 - 时钟:150MHz
- 延迟时间 - 传输:1ns
- 触发器类型:正边沿
- 输出电流高,低:12mA,12mA
- 电源电压:1.65 V ~ 3.6 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:56-BSSOP(0.295",7.50mm 宽)
- 包装:®
- 其它名称:296-5204-6
产品特性
- Member of the Texas Instruments Widebus Family
- EPIC (Enhanced-Performance Implanted CMOS) Submicron Process
- Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages
产品概述
This 20-bit flip-flop is designed for low-voltage 1.65-V to 3.6-V VCC operation.The 20 flip-flops of the SN74ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the clock-enable (CLKEN)\ input is low. If CLKEN\ is high, no data is stored.A buffered output-enable (OE)\ input places the 20 outputs in either a normal logic state (high or low level) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.The SN74ALVCH162721 is characterized for operation from 40°C to 85°C.