SN74ALVC164245DGG 供应商
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SN74ALVC164245DGGR 原装现货
品牌:TI/德州 封装/批号:TSSOP/2037+5 -
SN74ALVC164245DGG
品牌:TI 封装/批号:原厂原装/22+ -
SN74ALVC164245DGG
品牌:TI 封装/批号:TSSOP48/23+ -
SN74ALVC164245DGG
品牌:TI 封装/批号:TSSOP/21+ -
SN74ALVC164245DGGR
品牌:TI 封装/批号:TSSOP48/23+ -
SN74ALVC164245DGGR
品牌:转换器IC 封装/批号:Texas Instruments/连可连代销V -
SN74ALVC164245DGGR
品牌:TI 封装/批号:/2021+ -
SN74ALVC164245DGGR
品牌:TI 封装/批号:TSSOP/7 -
SN74ALVC164245DGGR
品牌:TI/德州仪器 封装/批号:TSSSOP48/21+ -
SN74ALVC164245DGGR
品牌:TI 封装/批号:/
SN74ALVC164245DGG 属性参数
- 现有数量:2,175现货3,040Factory
- 价格:1 : ¥21.70000管件
- 系列:74ALVC
- 包装:管件
- 产品状态:在售
- 转换器类型:电压电平
- 通道类型:双向
- 电路数:2
- 每个电路通道数:8
- 电压 - VCCA:2.3 V ~ 3.6 V
- 电压?- VCCB:3 V ~ 5.5 V
- 输入信号:-
- 输出信号:-
- 输出类型:三态,非反相
- 数据速率:-
- 工作温度:-40°C ~ 85°C(TA)
- 特性:-
- 安装类型:表面贴装型
- 封装/外壳:48-TFSOP(0.240",6.10mm 宽)
- 供应商器件封装:48-TSSOP
产品特性
- Member of the Texas Instruments Widebus™ Family
- Maximum tpd of 5.8 ns at 3.3 V
- ±24-mA Output Drive at 3.3 V
- Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- APPLICATIONS Electronic Points of Sale Printers and Other Peripherals Motor Drives Wireless and Telecom Infrastructures Wearable Health and Fitness Devices
- Electronic Points of Sale
- Printers and Other Peripherals
- Motor Drives
- Wireless and Telecom Infrastructures
- Wearable Health and Fitness Devices
产品概述
This 16-bit (dual-octal) noninverting bus transceiver contains two separate supply rails.
B port has VCCB, which is set to operate at 3.3 V and 5 V. A port has
VCCA, which is set to operate at 2.5 V and 3.3 V. This allows for
translation from a 2.5-V to a 3.3-V environment, and vice versa, or from a 3.3-V to a 5-V environment, and vice versa.The SN74ALVC164245 is designed for asynchronous communication between data buses. The
control circuitry (1DIR, 2DIR, 1OE, and 2OE) is powered by VCCA.To ensure the high-impedance state during power up or power down, the output-enable
(OE) input should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the
driver.The logic levels of the direction-control (DIR) input and the output-enable
(OE) input activate either the B-port outputs or the A-port outputs or place
both output ports into the high-impedance mode. The device transmits data from the A bus to the B
bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs
are activated. The input circuitry on both A and B ports always is active and must have a logic
HIGH or LOW level applied to prevent excess ICC and
ICCZ.
SN74ALVC164245DGG 数据手册
SN74ALVC164245DGG 电路图