SN74ALS841DW 供应商
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SN74ALS841DW
品牌:TI 封装/批号:原厂原装/22+
SN74ALS841DW 属性参数
- 标准包装:25
- 类别:集成电路 (IC)
- 家庭:逻辑 - 锁销
- 系列:74ALS
- 逻辑类型:D 型透明锁存器
- 电路:10:10
- 输出类型:三态
- 电源电压:4.5 V ~ 5.5 V
- 独立电路:1
- 延迟时间 - 传输:7ns
- 输出电流高,低:2.6mA,24mA
- 工作温度:0°C ~ 70°C
- 安装类型:表面贴装
- 封装/外壳:24-SOIC(0.295",7.50mm 宽)
- 供应商设备封装:24-SOIC
- 包装:管件
- 其它名称:296-5086-5
产品特性
- 3-State Buffer-Type Outputs Drive Bus Lines Directly
- Bus-Structured Pinout
- Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
- Buffered Control Inputs to Reduce dc Loading Effects
- Power-Up High-Impedance State
- Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs
产品概述
These 10-bit latches feature 3-state outputs designed specifically
for driving highly capacitive or relatively low-impedance loads. They
are particularly suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working registers.The ten latches are transparent D-type latches. The SN74ALS841 and
SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has
inverting D\ inputs.A buffered output-enable () input places the ten outputs in either a normal logic
state (high or low logic levels) or a high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and increased drive
provide the capability to drive bus lines without interface or pullup
components.does not affect
the internal operation of the latches. Previously stored data can be
retained or new data can be entered while the outputs are off.The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for
operation from 0°C to 70°C.