SN65ELT21D 供应商
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SN65ELT21D
品牌：TI 封装/批号：原厂原装/22+ -
SN65ELT21DGK
品牌：TI(德州仪器) 封装/批号：VSSOP-8/2022+ -
SN65ELT21DR
品牌：TI/德州仪器 封装/批号：21+/SOP8
SN65ELT21D 属性参数
- 标准包装：75
- 类别：集成电路 (IC)
- 家庭：逻辑 - 变换器
- 系列：65ELT
- 逻辑功能：变换器
- 位数：1
- 输入类型：PECL
- 输出类型：TTL
- 数据速率：-
- 通道数：1
- 输出/通道数目：1
- 差分 - 输入:输出：是/无
- 传输延迟（最大）：4.5ns
- 电源电压：4.2 V ~ 5.7 V
- 工作温度：-40°C ~ 85°C
- 封装/外壳：8-SOIC（0.154"，3.90mm 宽）
- 供应商设备封装：8-SOIC
- 包装：管件
- 其它名称：296-24661-5
产品特性
- 3ns (TYP) Propagation Delay
- Operating Range: VCC = 4.2 V to 5.7 V with GND = 0 V
- 24-mA TTL Output
- Deterministic Output Value for Open Input Conditions or When Inputs < 1.3 V
- Built-In Temperature Compensation
- Drop-In Compatible to the MC10ELT21, MC100ELT21
- APPLICATIONS Data and Clock Transmission Over Backplane Signaling Level Conversion for Clock or Data
- Data and Clock Transmission Over Backplane
- Signaling Level Conversion for Clock or Data
产品概述
The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V. The VBB pin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCC and VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBB open when it is not used.The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.
SN65ELT21D