CY74FCT399ATSOC 供应商
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CY74FCT399ATSOC
品牌：TI 封装/批号：原厂原装/22+
CY74FCT399ATSOC 属性参数
- 标准包装：40
- 类别：集成电路 (IC)
- 家庭：逻辑 - 信号开关，多路复用器，解码器
- 系列：74FCT
- 类型：多路复用器
- 电路：4 x 1:1
- 独立电路：1
- 输出电流高，低：32mA，64mA
- 电压电源：单电源
- 电源电压：4.75 V ~ 5.25 V
- 工作温度：-40°C ~ 85°C
- 安装类型：表面贴装
- 封装/外壳：16-SOIC（0.295"，7.50mm 宽）
- 供应商设备封装：16-SOIC
- 包装：管件
产品特性
- Function, Pinout, and Drive Compatible With FCT and F Logic
- Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
- Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
- Ioff Supports Partial-Power-Down Mode Operation
- Matched Rise and Fall Times
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Fully Compatible With TTL Input and Output Logic Levels
- 64-mA Output Sink Current 32-mA Output Source Current
产品概述
The CY74FCT399T is a high-speed quad 2-input register that selects four bits of data from either of two sources
(ports) under control of a common select (S) input. Selected data are transferred to a 4-bit output register
synchronous with the low-to-high transition of the clock (CP) input. The 4-bit D-type output register is fully edge
triggered. The data inputs (I0X, I1X) and S input must be stable only one setup time prior to, and hold time after,
the low-to-high transition of CP for predictable operation. The CY74FCT399T has noninverted outputs.
This device is fully specified for partial-power-down applications using Ioff The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
CY74FCT399ATSOC