CY74FCT2573TSOCT 供应商
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CY74FCT2573TSOCT
品牌：TI 封装/批号：原厂原装/22+
CY74FCT2573TSOCT 属性参数
- 标准包装：1
- 类别：集成电路 (IC)
- 家庭：逻辑 - 锁销
- 系列：74FCT
- 逻辑类型：D 型透明锁存器
- 电路：8:8
- 输出类型：三态
- 电源电压：4.75 V ~ 5.25 V
- 独立电路：1
- 延迟时间 - 传输：1.5ns
- 输出电流高，低：15mA，12mA
- 工作温度：-40°C ~ 85°C
- 安装类型：表面贴装
- 封装/外壳：20-SOIC（0.295"，7.50mm 宽）
- 供应商设备封装：20-SOIC
- 包装：®
- 其它名称：296-28795-6
产品特性
- Function and Pinout Compatible With the Fastest Bipolar Logic
- 25- Output Series Resistors Reduce Transmission-Line Reflection Noise
- Reduced VOH (Typically = 3.3 V) Version of Equivalent FCT Functions
- Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
- Ioff Supports Partial-Power-Down Mode Operation
- Matched Rise and Fall Times
- 3-State Outputs
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Fully Compatible With TTL Input and Output Logic Levels
- 12-mA Output Sink Current 15-mA Output Source Current
产品概述
The CY74FCT2573T is an 8-bit, high-speed CMOS, TTL-compatible buffered latch with 3-state outputs that is
ideal for driving high-capacitance loads, such as memory and address buffers. On-chip 25- termination
resistors at the outputs reduce system noise caused by reflections. The CY74FCT2573T can replace the
CY74FCT573T to reduce noise in an existing design.
When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the
required setup times are latched when LE transitions from high to low. Data appears on the bus when the
output-enable (OE\) input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode,
data can be entered into the latches.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
CY74FCT2573TSOCT