CLVC540AQDWRG4Q1 供应商
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CLVC540AQDWRG4Q1
品牌：TI 封装/批号：原厂原装/22+
CLVC540AQDWRG4Q1 属性参数
- 标准包装：2,000
- 类别：集成电路 (IC)
- 家庭：逻辑 - 栅极和逆变器
- 系列：74LVC
- 逻辑类型：逆变器，缓冲器
- 电路数：1
- 输入数：8
- 特点：三态
- 电源电压：2 V ~ 3.6 V
- 电流 - 静态（最大值）：10µA
- 输出电流高，低：24mA，24mA
- 逻辑电平 - 低：0.8V
- 逻辑电平 - 高：2V
- 额定电压和最大 CL 时的最大传播延迟：5.3ns @ 3.3V，50pF
- 工作温度：-40°C ~ 125°C
- 安装类型：表面贴装
- 供应商设备封装：20-SOIC
- 封装/外壳：20-SOIC（0.295"，7.50mm 宽）
- 包装：带卷 (TR)
产品特性
- Qualified for Automotive Applications
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Operates From 2 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 5.3 ns at 3.3 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
- Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
- Ioff Supports Partial-Power-Down Mode Operation
产品概述
The SN74LVC540A octal buffer/driver is designed for 2.7-V to 3.6-V VCC operation.This device is ideal for driving bus lines or buffer-memory address registers. This device features inputs and outputs on opposite sides of the package that facilitate printed circuit board layout.The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1 or OE2) input is high, all outputs are in the high-impedance state.Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.