CD74HC4015M 供应商
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CD74HC4015M
品牌：TI 封装/批号：原厂原装/22+
CD74HC4015M 属性参数
- 标准包装：40
- 类别：集成电路 (IC)
- 家庭：逻辑 - 移位寄存器
- 系列：74HC
- 逻辑类型：移位寄存器
- 输出类型：标准
- 元件数：2
- 每个元件的位元数：4
- 功能：串行至并行
- 电源电压：2 V ~ 6 V
- 工作温度：-55°C ~ 125°C
- 安装类型：表面贴装
- 封装/外壳：16-SOIC（0.154"，3.90mm 宽）
- 供应商设备封装：16-SOIC N
- 包装：管件
- 其它名称：296-33081-5CD74HC4015M-ND
产品特性
- Maximum Frequency, Typically 60MHz CL = 15pF, VCC = 5V, TA = 25°C
- Positive-Edge Clocking
- Overriding Reset
- Buffered Inputs and Outputs
- Fanout (Over Temperature Range) Standard Outputs . . . . . 10 LSTTL Loads Bus Driver Outputs . . . . . . 15 LSTTL Loads
- Standard Outputs . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . –55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types 2V to 6V Operation High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
产品概述
The ’HC4015 consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent Clock (CP) and Reset (MR) inputs as well as a single serial Data input. "Q" outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the Data input is transferred into the first register stage and shifted over one stage at each positive- going clock transition. Resetting of all stages is accomplished by a high level on the reset line.The device can drive up to 10 low power Schottky equivalent loads. The ’HC4015 is an enhanced version of equivalent CMOS types.
CD74HC4015M