IC元器件

CD74ACT238E 供应商

CD74ACT238E 属性参数

  • 标准包装:25
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 信号开关,多路复用器,解码器
  • 系列:74ACT
  • 类型:解码器/多路分解器
  • 电路:1 x 3:8
  • 独立电路:1
  • 输出电流高,低:24mA,24mA
  • 电压电源:单电源
  • 电源电压:4.5 V ~ 5.5 V
  • 工作温度:-55°C ~ 125°C
  • 安装类型:通孔
  • 封装/外壳:16-DIP(0.300",7.62mm)
  • 供应商设备封装:16-PDIP
  • 包装:管件
  • 其它名称:296-32988-5CD74ACT238E-ND

产品特性

  • Inputs Are TTL-Voltage Compatible
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Designed Specifically for High-Speed Memory Decoders and Data-Transmission Systems
  • Incorporates Three Enable Inputs to Simplify Cascading and/or Data Reception
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current Fanout to 15 F Devices
  • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

产品概述

The CD74ACT238 decoder/demultiplexer is designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of this decoder and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications (see Application Information).