CD4522BMT 供应商
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CD4522BMT
品牌：TI 封装/批号：原厂原装/22+
CD4522BMT 属性参数
- 标准包装：250
- 类别：集成电路 (IC)
- 家庭：逻辑 -计数器，除法器
- 系列：4000B
- 逻辑类型：除以 N
- 方向：下
- 元件数：1
- 每个元件的位元数：4
- 复位：异步
- 计时：-
- 计数速率：8MHz
- 触发器类型：正，负
- 电源电压：3 V ~ 18 V
- 工作温度：-55°C ~ 125°C
- 安装类型：表面贴装
- 封装/外壳：16-SOIC（0.154"，3.90mm 宽）
- 供应商设备封装：16-SOIC N
- 包装：带卷 (TR)
产品特性
- Internally synchronous for high internal and external speeds
- Logic edge-clocked design — increments on positive Clock transition or on negative Clock inhibit transition.
- 100% tested for quiescent current at 20-V
- 5-V, 10-V, and 15-V parametric ratings
- Standard symmetrical output characteristics
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
- Applications: Frequency synthesizers Phase-locked loops Programmable down counters Programmable frequency dividers
- Frequency synthesizers
- Phase-locked loops
- Programmable down counters
- Programmable frequency dividers
产品概述
CD4522B programmable BCD counter has a decoded "0" state output for divide-by-N applications. In single stage operation the "0" output is tied to the Preset Enable input. The Cascade Feedback allows multiple stage divide-by-N operation without the need for external gating. A HIGH on the Clock Inhibit disables the pulse-counting function. A HIGH on the Master Reset asynchronously resets the divide-by-N operation. The output is presented in BCD format.The CD4522B-series types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages
(M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
CD4522BMT