CD4099BE 供应商
CD4099BE 属性参数
- 标准包装:25
- 类别:集成电路 (IC)
- 家庭:逻辑 - 锁销
- 系列:4000B
- 逻辑类型:D 型,可寻址
- 电路:1:8
- 输出类型:标准
- 电源电压:3 V ~ 18 V
- 独立电路:1
- 延迟时间 - 传输:50ns
- 输出电流高,低:6.8mA,6.8mA
- 工作温度:-55°C ~ 125°C
- 安装类型:通孔
- 封装/外壳:16-DIP(0.300",7.62mm)
- 供应商设备封装:16-PDIP
- 包装:管件
- 其它名称:296-2070-5
产品特性
- Serial data input
- Active parallel output
- Storage register capability
- Master clear
- Can function as demultiplexer
- Standardized, symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package-temperature range) = 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 V at VDD = 15 V
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of B Series CMOS Devices"
- Applications: Multi-line decoders A/D converters
- Multi-line decoders
- A/D converters
产品概述
CD4099B 8-bit addressable latch is a serial-input, parallel-output storage register that can perform a variety of functions.Data are inputted to a particular bit in the latch when that bit is addressed (by means of input A0, A1, A2) and when WRITE DISABLE is at a low level. When WRITE DISABLE is high, data entry is inhibited; however, all 8 outputs can be continuously read independent of WRITE DISABLE and address inputs.A master RESET input is available, which resets all bits to a logic "0" level when RESET and WRITE DISABLE are at a high level. When RESET is at a high level, and WRITE RESET is at a low level, the latch acts as a 1-of-8 demultiplexer; the bit that is addressed has an active output which follows the data input, while all unaddressed bits are held to a logic "0" level.The CD4099B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline package (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).