74LVC2G125DCTRG4 供应商
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74LVC2G125DCTRG4
品牌：TI 封装/批号：原厂原装/22+ -
74LVC2G125DCTRG4
品牌：TI(德州仪器) 封装/批号：SM8(SSOP)/2022+
74LVC2G125DCTRG4 属性参数
- 制造商：Texas Instruments
- 产品种类：缓冲器和线路驱动器
- 输入线路数量：2
- 输出线路数量：2
- 极性：Non-Inverting
- Supply Voltage - Max：5.5 V
- Supply Voltage - Min：1.65 V
- 最大工作温度：+ 85 C
- 安装风格：SMD/SMT
- 封装 / 箱体：SSOP-8
- 封装：Reel
- 高电平输出电流：- 32 mA
- 逻辑系列：LVC
- 逻辑类型：CMOS
- 低电平输出电流：32 mA
- 最小工作温度：- 40 C
- 每芯片的通道数量：2
- 输出类型：3-State
- 传播延迟时间：4.3 ns at 3.3 V, 3.7 ns at 5 V
- 工厂包装数量：3000
产品特性
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model 1000-V Charged-Device Model
- 2000-V Human-Body Model
- 1000-V Charged-Device Model
- Available in the Texas Instruments NanoFree™ Package
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 4.3 ns at 3.3 V
- Low Power Consumption, 10-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
- Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
- Can Be Used as a Down Translator to Translate Inputs From a Max of 5.5 V Down to the VCC Level
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
产品概述
The SN74LVC2G125 device is a dual bus buffer gate, designed for 1.65-V to 5.5-V
VCC operation. This device features dual line drivers with 3-state outputs.
The outputs are disabled when the associated output-enable (OE) input is
high.NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the
driver.This device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
74LVC2G125DCTRG4 电路图
