74ACT11374DWR 供应商
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74ACT11374DWR
品牌:TI 封装/批号:原厂原装/22+
74ACT11374DWR 属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 触发器
- 系列:74ACT
- 功能:标准
- 类型:D 型总线
- 输出类型:三态非反相
- 元件数:1
- 每个元件的位元数:8
- 频率 - 时钟:70MHz
- 延迟时间 - 传输:8.5ns
- 触发器类型:正边沿
- 输出电流高,低:24mA,24mA
- 电源电压:4.5 V ~ 5.5 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:24-SOIC(0.295",7.50mm 宽)
- 包装:®
- 其它名称:296-29547-6
产品特性
- Eight D-Type Flip-Flops in a Single Package
- 3-State Bus Driving True Outputs
- Full Parallel Access for Loading
- Inputs Are TTL-Voltage Compatible
- Flow-Through Architecture Optimizes PCB Layout
- Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
- EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
- 500-mA Typical Latch-Up Immunity at 125°C
- Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (NT)
产品概述
This 8-bit flip-flop features 3-state outputs designed
specifically for driving highly-capacitive or relatively
low-impedance loads. It is particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus drivers, and working
registers.The eight flip-flops of the 74ACT11374 are edge-triggered D-type
flip-flops. On the positive transition of the clock (CLK) input, the
Q outputs are set to the logic levels set up at the data (D) inputs.
An output-enable ()
input can be used to place the eight outputs in either a normal logic
state (high or low logic levels) or a high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance third state provides the
capability to drive bus lines in a bus-organized system without need
for interface or pullup components.does not affect
the internal operation of the flip-flops. Old data can be retained or
new data can be entered while the outputs are in the high-impedance
state.The 74ACT11374 is characterized for operation from -40°C to
85°C.